5584836472886096789EE178v02| Application Note
Engineer-to-Engineer Note
EE-178
a
Technical notes on using Analog Devices DSPs, processors and development tools
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The ADSP-TS101S TigerSHARC On-chip SDRAM Controller
Contributed by Maikel Kokaly-Bannourah & Robert Hoffmann Rev 2 December 19, 2003
1 Introduction
In systems where a Digital Signal Processor (DSP) is used to address Synchronous Dynamic Random Access Memory (SDRAM), additional hardware and software is needed to handle the multiplexed row and column addressing, as well as the refresh and precharge requirements of the SDRAM. The ADSPTS101S TigerSHARC processor uses a hardware intensive solution, an on-chip SDRAM controller. This Engineer-to-Engineer Note introduces the ADSP-TS101S on-chip SDRAM controller`s characteristics. The internal signal chain is shown with the necessary address-mapping scheme. The command truth table gives detailed information about execution in the SDRAM. The important power-up sequence summarizes detail information to start successful designs. A timing overview demonstrates the performance for different access modes. For basic understanding of SDRAM memories, refer to "The ABC of SDRAMemory (EE-126)" [3].
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