99941520Ron_Modulati_Whitepaper| Application Note
RON Modulation in CMOS Switches and Multiplexers; What It Is and How to Predict Its Effect on Signal Distortion*
By John Wynne
A single CMOS switch or a single channel of a CMOS multiplexer essentially consists of an N-channel and a P-channel MOSFET transistor in parallel. Figure 1a shows this basic arrangement. The respective drains and sources of the two transistors are tied together to become the switch terminals while the gates of the two transistors are usually driven with the power supply voltages, VDD and VSS, to control the on/off action of the switch. Essentially, the N-channel is on for positive gate-tosource voltages and off for negative gate-to-source voltages while the P-channel is vice versa.
VDD(+)
on-channel resistance with input signal is termed RON modulation, and the actual spread of maximum channel resistance to minimum channel resistance over the signal swing of interest is represented by DRON.
RON
RON (N-CHANNEL)
RON (P-CHANNEL) CMOS RESULTANT RON
0
Q1 P-CHANNEL Q3 P-CHANNEL D Q2 N-CHANNEL VSS( ) VDD VSS N-CHANNEL Q4 S
+
VS (VD)
Figure 1b. Individual MOSFET R ON Profiles vs. V S(V D)
Figure 2 shows typical RON profiles for Analog Devices ADG508A/ADG509A multiplexers. Three RON curves are shown for three power supply ranges. As might be expected, both the absolute value of the channel RON and the DRON increase as the power supplies are reduced. It is instructive to compare the RON profiles from this generation of multiplexers with devices from recent generations. Figure 3 shows the RON profile for the 4-/8channel ADG608/ADG609 multiplexers. Due to the use of a 3 mM, 12 V process, these devices are limited to 5 V operation rather than the 15 V operation of the ADG508A/ADG509A series, which is built on a 6 mM, 44 V process. More modern examples of the emphasis within ADI to reduce RON modulation are single SPDT switches, ADG619/ADG620, running off of 5 V supplies or a single +5 V supply. The typical DRON for these switches is below 1 W with a typical on resistance of 4 W.
Figure 1a. Basic CMOS Switch
With a fixed voltage on the gate the effective drive voltage for either transistor varies in proportion to the polarity and magnitude of the analog signal passing through the switch. In Figure 1b, where RON, the resistance of the on switch, is plotted against applied analog switch voltage, VS or VD, the resistance of the N-channel increases with positive voltage and the resistance of the P-channel increases with negative VS or VD. The resultant parallel combination of these two characteristics (heavy line in Figure 1b) results in the well-known crown or twin-peak characteristic. This variation in
*Based on Application Note AN-251, which appeared in the ADI Applications Reference Manual of 1993.
a
1
Analog Devices, Inc., 2002
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