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Fast Floating-Point Arithmetic Emulation on Blackfin Processors
Contributed by Central Apps Rev 4 August 23, 2007
Introduction
Processors optimized for digital signal processing are divided into two broad categories: fixed-point and floating-point. In general, the cutting-edge fixed-point families tend to be fast, low power, and low cost, while floating-point processors offer high precision and wide dynamic range in hardware. While the Blackfin processor architecture was designed for native fixed-point computations, it can achieve clock speeds that are high enough to emulate floating-point operations in software. This gives the system designer a choice between hardware efficiency of floating-point processors and the low cost and power of Blackfin processor fixed-point devices. Depending on whether full standard conformance or speed is the goal, floating-point emulation on a fixed-point processor might use the IEEE-754 standard or a fast floating-point (non-IEEE-compliant) format. On the Blackfin processor platform, IEEE-754 floating-point functions are available as library calls from both C/C++ and assembly language. These librarie
s emulate floating-point processing using fixed-point logic. To reduce computational complexity, it is sometimes advantageous to use a more relaxed and faster floating-point format. A significant cycle savings can often be achieved in this way. This document shows how to emulate fast floating-point arithmetic on the Blackfin processor. A two-word format is employed for
representing short and long fast floating-point data types. C-callable assembly source code is included for the following operations: addition, subtraction, multiplication and conversion between fixed-point, IEEE-754 floating-point, and the fast floating-point formats.
Overview
In fixed-point number representation, the radix point is always at the same location. While this convention simplifies numeric operations and conserves memory, it places a limit the magnitude and precision. In situations that require a large range of numbers or high resolution, a changeable radix point is desirable. Very large and very small numbers can be represented in floating-point format. Floatingpoint format is basically scientific notation; a floating-point number consists of a mantissa (or fraction) and an exponent. In the IEEE-754 standard, a floating-point number is stored in a 32-bit word, with a 23-bit mantissa, an 8-bit exponent, and a 1-bit sign. In the fast floatingpoint two-word format described in this document, the exponent is a 16-bit signed integer, while the mantissa is either a 16- or a 32bit signed fraction (depending on whether the short of the long fast floating-point data type is used). Normalization is an important feature of floatingpoint representation. A floating-point number is
normalized if it contains no redundant sign bits
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