EE_314_Rev_1| Application Note

EE_314_Rev_1 PDF

EE_314_Rev_1| Application Note


Engineer-to-Engineer Note

EE-314

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Technical notes on using Analog Devices DSPs, processors and development tools
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Booting the ADSP-BF561 Blackfin Processor
Contributed by Jayanti Addepalli Rev 1 May 15, 2007

Introduction
This EE-Note discusses the booting process for ADSP-BF561 Blackfin dual-core processors. The available boot modes for silicon revisions 0.2 and beyond are addressed. This document also describes the loader file structure with regard to the booting process. This document is supplemented by code examples verified using VisualDSP++ 4.5 (November update) on an ADSP-BF561 EZ-KIT Lite evaluation platform.

Booting Process
Booting refers to the process of loading application code and data into the internal and external memories of the Blackfin processor immediately after reset. The code and data are brought in from an external source, which could be a memory device or a host processor, depending on the boot mode configuration. The boot ROM, which occupies the lowest 2 Kbytes (Blackfin memory at address 0xEF000000 0xEF0003FF) of internal memory space, includes a bootstrap kernel that contains the configuration settings required for each boot mode. The BMODE[1:0] pins configure the boot mode. These pins are sensed and latched into the system reset configuration register (SICA_SYSCR) when the processor is brought out of reset. The bootstrap code reads SICA_SYSCR to determine the value of the BMODE[1:0] pins. Depending on the selected boot mode, the appropriate code is executed from the boot ROM. When the /RESET signal to the processor is released, core A executes the boot kernel code. The application is loaded from the source int
o internal and/or external memory. The external memory can be SRAM or SDRAM. Core B is held in the idle state during this time. The application is expected to be in a defined format, referred to as the boot stream. A boot stream is composed of multiple blocks of data and commands. Each block contains header information that indicates what the block is supposed to be (e.g., a zero-fill block, an initialization block, or a final block). The boot kernel processes the boot stream block-by-block until reaching a block flagged as the last block. The control then jumps to the start of core A instruction memory to begin code execution.

Copyright 2007, Analog Devices, Inc. All rights reserved. Analog Devices assumes no responsibility for customer product design or the use or application of customers' products or for any infringements of patents or rights of others which may result from Analog Devices assistance. All trademarks and logos are property of their respective holders. Information furnished by Analog Devices applications and development tools engineers is believed to be accurate and reliable, however no responsibility is assumed by Analog Devices regarding technical accuracy and topicality of the content provided in Analog Devices Engineer-to-Engineer Notes.


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