emp157159| Application Note
Basics of Embedded Audio Processing
(a)
CAPLN CAPLP VINLP VINLN AVDD DVDD ODVDD CASC Analog Input Buffer Multibit - Modulator Decimator Data Port LRCLK BCLK DOUT DIN ____ RESET MCLK CLATCH Control Clock CIN COUT XCTRL
VREF VINRP VINRN Analog Input Buffer Multibit - Modulator
AD1871
Filter Engine
Clock Divider
Decimator
SPI Port
CAPRN CAPRP
AGND
DGND
(b)
12.288 MHz XTAL
MCLK Clock Divider Data Port LRCLK BCLK DOUT RFS SPORT RSCLK DR
Analog signal
AD1871
Blackfin ADSP-BF533
SPI Port
SPI Port CLATCH Control Clock CIN COUT SPISELx SCK
MOSI MISO
Figure 5.4 (a) Functional block diagram of the AD1871 audio ADC (b) Glueless connection of an ADSP-BF533 media processor to the AD1871
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