AN345| Application Note
Maxim/Dallas > App Notes > COMMUNICATIONS CIRCUITS
TELECOM
Keywords: T1, framer, SCT, single chip transceiver, AT&T, SLC96, SLC-96, TR-08, T1 framers
May 31, 2001
APPLICATION NOTE 345
DS21352/552, DS2151, DS2152, DS2141A, DS21Q42 Programming SLC-96
This application note describes how to use the SLC-96 mode found in all Dallas Semiconductor T1 framers and single chip transceivers (SCTs). The SLC-96 mode is used in T1 was designed by AT&T as a digital loop carrier system that provides service for 96 subscribers over 3 to 5 separate T1 lines. The frame format of SLC-96 closely resembles that of the super frame (SF or D4) format but additional data link information is transferred to make advanced functions such as single party, multiparty, coin telephone, and special service circuits available. Because of the complexity of the SLC-96 specification, special synchronization circuitry, data registers, and status registers were added to the T1 devices which allow the designer to take advantage of the SLC-96 functionality. The application note goes into an in-depth explanation of how the SLC-96 circuitry operates and explains the how the data link transports the additional C, M, A, and S bit information. The C, M, A, and S bits stand for the concentrator field,
maintenance field, alarm field, and protection line switch field respectively. Together these bits are used to create the SLC-96 data link. To assist in the software design, flow charts are included with step-by-step instructions for transmitting and receiving data over the SLC-96 data link. In the end, the designer should have enough information to implement the necessary SLC-96 communications in the target system. Introduction This application note applies to the following products: T1 Framers T1 SCTs DS2141A DS21Q41B DS21Q42 DS21FF42 DS21FT42 DS2151 DS2152 DS21352 DS21552 DS21Q352 DS21Q552 In a SLC-96-based transmission scheme, the standard Fs-bit pattern is robbed to make room for a set of message fields. The SLC-96 multiframe is made up of six D4 superframes, so it is 72 frames long. In the 72frame SLC-96 multiframe, 36 of the framing bits are the normal Ft pattern and the other 36 bits are divided into alarm, maintenance, spoiler, and concentrator bits, as well as 12 bits of the normal Fs pattern. Ple
ase see the Bellcore document TR-TSY-000008 for more details about SLC-96. Receive-Side SLC-96 Applications To enable the device to synchronize onto a SLC-96 pattern, the following configuration should be used:
q q q
Set to D4 framing mode (CCR2.3 = 0) Set to cross-couple Ft and Fs bits (RCR1.3 = 1) Set to minimum sync time (RCR1.2 = 0)
The user has the option to either extract the SLC-96 message fields from the on-board RFDL register or via the external RLINK pin. The information is always available at both locations. If the user wishes to extract the message bits via the RLINK pin, then some hardware must be added to decode the bits. The SLC-96 message
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