AN3903| Application Note
Maxim/Dallas > App Notes > DIGITAL POTENTIOMETERS
POWER-SUPPLY CIRCUITS
Keywords: DS1863, DS1865, fiber Monitoring, Optical transciever
Aug 18, 2006
APPLICATION NOTE 3903
Using Internal Calibration and Right Shifting (Scalable Dynamic Ranging) on the DS1863/DS1865 to Enhance ADC Performance
This application note discusses how an application can benefit from using internal calibration and right shifting (Scalable Dynamic Ranging) with the DS1863/DS1865 controller/monitor chip. The article explains how to implement internal calibration and right shifting, and provides an example to illustrate the process.
Introduction
The DS1863 and the DS1865 controller/monitor devices use internal calibration and right shifting (Scalable Dynamic Ranging) to greatly enhance the internal 13-bit ADC, giving it higher precision and accuracy without added cost and size. Furthermore, the DS1863/DS1865's internal calibration features both programmable scale and programmable offset, which eliminate most, if not all, external signal-conditioning circuitry. With programmable scaling in the analog domain before the ADC, the input signal is scaled to use the entire range of the ADC. Then while in the digital domain, right shifting can be used to divide the digital output back down so that the desired (or mandated by SFF-8472) LSB remains unaffected and even transparent to the user.
Analog Monitor Inputs
The block diagram of the DS1863/DS1865 MON inputs is shown in Figure 1. For clarity, only one input is illustrated, although the concepts apply to all four MON inputs (MON1, MON2, MON3, and MON4). The MON inputs are used to monitor signals like Tx Power and Rx Power.
Figure 1. Block diagram of the MON input(s) on the DS1863/DS1865. As Figure 1 shows, a single-ended voltage is applied to a DS1863/DS1865 MON pin. While in the analog domain, the voltage is fed into a programmable scale block. The scale block makes it possible to calibrate the MON channel to achieve a desired LSB or full-scale voltage. The full-scale voltage is the desired LSB 2n, where n is the number of bits. Furthermore, the scale block makes it possible to internally gain small input signals to maximize use of the ADC. This procedure will be described in more detail later.
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