AN898| Application Note

AN898 PDF

AN898| Application Note


Maxim > App Notes > POWER-SUPPLY CIRCUITS Keywords: LDO, linear regulator, low dropout, regulators, PSRR, low noise, cellphone, cellular, handset, RF, baseband, audio, GSM

Dec 26, 2001

APPLICATION NOTE 898

Selecting LDO Linear Regulators for Cellphone Designs
Abstract: Low-dropout LDO linear regulators are used to power many sections of a typical cellular handset. However, these baseband, RF, and audio sections have different requirements that influence which LDO is most appropriate. After discussion of the specific requirements, different LDOs are recommended. Also, some LDO design techniques are briefly discussed to demonstrate how an LDO may be optimized for a specific level of performance. Cellular phone designs require linear regulators with low-dropout, low-noise, high PSRR, low quiescent current (Iq), and low-cost. They need to deliver a stable output and use small-value output capacitors. Ideally, one device would have all these characteristics and one low-dropout linear regulator (LDO) could be used anywhere in the phone without worry. But in practice, the various cell phone blocks are best powered by LDOs with different performance characteristics. This application note provides guidance in choosing the right LDO to power each cell phone block.

Baseband Chipset Power Supply
Most cellular phone baseband chipsets require power supplies for three circuit blocks: internal digital circuitry, analog circuitry, and peripheral interface circuitry. BB internal digital circuits typically operate from 1.8V to 2.6V. Since most phones shut off when the Li+ battery voltage falls to 3.2-3.3V, there is usually at least 500-600mV of headroom for the BB digital LDO, so dropout is not critical. Output noise and the PSRR are not critical specs for the digital circuits. Instead, this supply requires low quiescent current at light loads because this LDO stays on at all times. Figure 1 shows how the digital supply current of a representative GSM chipset core (ADI AD20msp425) varies as a function of time. In the standby mode, the microprocessor consumes only around 200uA. Since the phone stays in standby for the longest percentage of time, using a 2uA quiescent current LDO, instead of 100uA LDO, saves 98uA and extends the standby time by 300uA /202uA, or 1.485 times.

Figure 1. ADI AD20msp425 GSM chipset core power consumption profile.


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