AN94| Application Note
Maxim > App Notes > MICROCONTROLLERS Keywords: soft microcontroller, secure microcontroller, power-fail monitor, watchdog timer, NVRAM, bootstrap loader, DS5000FP, DS5001FP, micros, microcontrollers, nv ram
Aug 10, 2001
APPLICATION NOTE 94
Using the Secure Microcontroller with EPROM/ROM
Abstract: A designer using the DS5000FP or DS5001FP soft microcontroller may opt to use an EPROM instead of a NV RAM. This application note describes the design precautions when using a non-battery backed approach. Certain pins on the device will require special attention for the power-fail interrupt and power-fail reset to work properly. Problems may arise with memory interface signals when powered off in data retention mode.
Overview
The Soft Microcontroller family is designed to take advantage of the many features provided by NV RAM technology. Occasionally a designer may wish to use an EPROM or other non-battery backed technology for program storage. While this sacrifices features such as the Bootstrap loader and program encryption, it will still allow a designer to use Soft Microcontroller features such as the power-fail monitor, watchdog timer and the I/O pins made available by the use of the embedded byte-wide bus. This application note addresses considerations when designing such a system using the DS5000FP and DS5001FP Soft Microcontrollers. This application note is not applicable to the DS5002FP Secure Microcontroller as it must use NV RAM to support the encryption features.
Using the Soft Microcontroller Without a Battery
The Soft Microcontroller will work reliably without a battery if a few design precautions are taken. The VBAT input must be tied to VSS if a battery will not be used in the design. A floating VBAT input will cause unreliable device operation and/or a spontaneous reset. Note that on DS5000FP devices revision D6 or earlier, the power-fail interrupt and power-fail reset will not work properly if VBAT is tied to VSS . On these devices, the VBAT signal is used as a voltage reference to determine the reset trip point and should be approximately 3.0V when VCC > 3.0V. The revision level is marked on each device as follows: xxxxRR-16, where RR is the revision level. The lack of a battery means that registers that are typically nonvolatile will default to their no VLI reset state. The registers shown in Table 1 should be reinitialized as part of a power-on reset routine to ensure that they are properly set. Note that upon a no VLI reset the DS5001FP will be configured for a partition of 64kB and a range of 32KB. Altho
ugh this is an invalid setting, the device will operate correctly below the 32kB boundary. The memory configuration of the DS5001FP can only be changed from this setting via the bootstrap loader. Table 1. Nonvolatile Registers PCON MCON RPCTL CRC 87h C6h D8h C1h
Encryption Key N/A
