app2858| Application Note

Application Note 2858
DS1859 Internal Calibration and Right Shifting (Scalable Dynamic Ranging)
www.maxim-ic.com INTRODUCTION
What sets the DS1859 apart from the crowd is its internal calibration and right shifting (Scalable Dynamic Ranging) features. When used in conjunction, these features greatly enhance the DS1859's 12-bit ADC, giving it the precision and accuracy of up to a 16-bit ADC without the added cost and size. Furthermore, the DS1859's internal calibration features both programmable gain and programmable offset, eliminating most, if not all, external signal conditioning circuitry. By providing programmable gain in the analog domain before the ADC, the input signal can be amplified/attenuated to make use of the entire range of the ADC. Then, while in the digital domain, right shifting can then be used to scale (divide) the digital output back down so that the desired (or mandated by SFF-8472) LSB remains unaffected and even transparent to the user. The purpose of this application note is to illustrate how an application can benefit from using internal calibration and right shifting. Furthermore, this application note wil
l provide valuable information on how to implement internal calibration and right shifting. Finally, an example is provided to illustrate the application of the discussed topics.

DS1859 ANALOG MONITOR INPUTS
Before going any further, it is beneficial to look at a block diagram of the DS1859 MON inputs (see Figure 1). For the sake of clarity, only one input is illustrated, although the concepts apply to all three MON inputs.

Figure 1. DS1859 MON INPUT BLOCK DIAGRAM

ANALOG LIGHT, POWER, CURRENT, OR VOLTAGE MONX INPUT (V)

DIGITAL

GAIN Min: 0V Max: VCC

ADC

S
+
DIGITAL OFFSET Min: - FS Max: + FS Typ: 0

RIGHT SHIFTING (N times) Min: 0000h Max: FFF8h*

MONX REGISTER (2 BYTES)

Min: 0000h Max: FFF8h

Min: 0000h Max: FFF8h* / 2N

* positive offset: Max = FFF8h negative offset: Max =

DS1859

As shown in the figure, a single-ended voltage is applied to a DS1859 MON pin. While in the analog domain, the voltage is fed into a programmable gain block capable of attenuation as well as gain. The gain block makes it possible to calibrate the MON channel to achieve a desired LSB or full-scale voltage. The full-scale voltage is the voltage at which the digital output reaches full scale (FFF8h). Furthermore, the gain block makes it possible to internally gain small input signals in order to maximize the use of the ADC. This will be described in more detail later.

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