AN-1683| Application Note

LMH7324 High Speed Comparator Evaluation Board

LMH7324 High Speed Comparator Evaluation Board
General Description
This board is designed to demonstrate the LMH7324 quad comparator with RSPECL outputs. It will facilitate the evaluation of the LMH7324 configured as a window detector. The board detects the level of the incoming signal and presents the outcome in a 3-bit presentation. One bit indicates that the signal is below the lowest window level, another bit indicates that the signal is above the highest window level, and the third bit indicates that the incoming signal is just between both set levels. All three outputs are fed to SMA connectors mounted at the edge of the board. The impedance of the output track is 50 which makes it easy to connect these signals to any scope or analyzer by the use of a 50 coaxial cable. Each comparator of the LMH7324 has individual positive supplies for the input and output circuits. The negative supply is common for all input and output circuitry. This setup will work with a supply of 2.5V as a minimum supply, with the window voltage centered at ground. If a setup with only one posit
ive supply voltage is used, jumper J1 (see Figure 7) has to be placed between both positive supply connections. To examine the possibility of two separate supplies for the input and the output stage the jumper has to be removed and an extra supply has to be connected.

National Semiconductor Application Note 1683 Gerrit Sergers September 2007

The window detector output is formed by the OR-function of combining both Q outputs of comparators B and C. Outputs which have an ECL (Emitter Coupled Logic) structure can be wired together to form an OR function. The overall truth table is shown in Table 2: TABLE 2. Truth Table VIN High In Window Low Con1 0 1 1 Con3 1 0 1 Con4 1 1 0

Basic Operation
REFERENCE LEVELS The circuit is built around the four comparators of one LMH7324. Two reference levels are created using four resisters and two capacitors (R3, R6, R7, R9 and C9, C12 see Figure 7) The `ref high' level is a positive voltage referred to the ground level and the `ref low' level is a negative voltage referred to ground. The input connector (con2) is also referenced to ground which means that any AC signal at the input will vary around the ground level, which is in the center of the reference levels. COMPARATORS The comparators B and C form the window detector, while the comparator A is a level detector indicating that the input voltage exceeds the `ref high' voltage in the positive direction. The comparator D is a level detector indicating that the input signal exceeds the `ref low' voltage in the negative direction. The outputs are connected to a 50 connector via a 50 track. All three outputs are `active low' as can be seen in Table 1. TABLE 1. Four Comparators Output VIN High In Window Low QA
0 1 1 QB 1 0 0 QC 0 0 1 QD 1 1 0

OUTPUTS Every output has a Q and Q connection and both outputs have been made active by a resistor connected to the VEE terminal. An ECL output becomes active when current flows out of the emitters of the output stage. This can be done by connecting a resistor to a `termination' voltage (VT) which is 2V below the VCCO. When using the VT solution every output resistor has to be 50 (R1, R2, R4, R5, R10, R11, R12). Another possibility is to connect a resistor to the most negative supply voltage. In case of a connection to VEE, the resistor must have a value which causes a current that complies with the `Normal Operating' conditions as mentioned in the datasheet. This demo board is designed for a supply voltage of 5V for the VCCO with a resistor to VEE with a value of 240 (R4 = 360 while R1, R2, R5, R10, R11, R12 = 240). In case the VCCO is raised to 12V all output resistors to VEE should be replaced with 500 resistors except R4 which should be 750. All three output signals are connected via a 50 track and a com
bined capacitor and jumper which are connected in parallel. A customer can now make a choice between a DC or an AC coupled output signal. In the case of a DC coupled output be aware of the offset voltage which causes an extra DC current into a connected scope or analyzer with 50 input impedance. SUPPLY VOLTAGES This demo board can operate with a simple dual supply of 2.5V. The output voltages are now about 1.35V and 1.0V and comply with LVDS and RSPECL levels. In the case of a single supply voltage of +5V the output levels are 3.85V and 3.5V, which is only RSPECL level compliant. In a single supply configuration be aware that the detection window starts at VEE level, which is actually the ground level. The LMH7324 is ground sensing but in this configuration the input signals cannot extend more than 200 mV below the ground level. Every comparator has a separate connection for the VCCI, VCCO and the VEE. The supply pins are decoupled with a small capacitance of 10 nF to the ground plane. Since the outputs are
referenced to the VCCO the output resistors are decoupled to this supply pin. For better low frequency decoupling a 47 uF capacitor is placed at the supply connector (con5). The supplies VCCI and VCCO can be shortened by a jumper (J1) in case both positive supply voltages are the same value.

AN-1683

2007 National Semiconductor Corporation

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