AN-32| Application Note
FET Circuit Applications
FET Circuit Applications
National Semiconductor Application Note 32 February 1970
Polycarbonate dielectric
TL H 6791 1
Sample and Hold With Offset Adjustment The 2N4339 JFET was selected because of its low lGSS (k100 pA) very-low lD(OFF) (k50 pA) and low pinchoff voltage Leakages of this level put the burden of circuit performance on clean solder-resin free low leakage circuit layout
TL H 6791 3
TL H 6791 2
Long Time Comparator The 2N4393 is operated as a Miller integrator The high Yfs of the 2N4393 (over 12 000 mmhos 5 mA) yields a stage gain of about 60 Since the equivalent capacitance looking into the gate is C times gain and the gate source resistance can be as high as 10 MX time constants as long as a minute can be achieved
JFET AC Coupled Integrator This circuit utilizes the ``m-amp'' technique to achieve very high voltage gain Using C1 in the circuit as a Miller integrator or capacitance multiplier allows this simple circuit to handle very long time constants
AN-32
C1995 National Semiconductor Corporation
TL H 6791
RRD-B30M115 Printed in U S A
AN-32 Application Note national Download PDF
Add this permalink to your bookmarks for future download of AN-32 ApplicationNote
Permalink: http://application.emcelettronica.com/national/AN-32
