rej05b0051_m16cap| Application Note
APPLICATION NOTE M16C/62A Group
Operation of SI/O3,4
1.0 Abstract
In transmitting data in this mode, choose functions from those listed in Table 1. Operations of the circled items are described below. Table 1. Choosed functions
Item Transfer clock source Transfer clock O Set-up Internal clock (f1 / f8 / f32) External clock (CLKi pin) O LSB first MSB first Item SOUTi initial value set function O Set-up Not used Used
2.0 Introduction
Operation (1) Transfer begins upon writing the SI/Oi transmit data. The transmit data is sent out from the SOUTi pin synchronously with falling edges of the transfer clock. (2) When SOUT finishes sending one byte of data, the interrupt request bit is set to 1. (3) After the transfer is completed, SOUT holds the last data for a 1/2 transfer clock period before going to a high-impedance state. Note Do not write data to the SI/Oi transmit/receive register (i = 3, 4; addresses 036016, 036416) during a transfer. Data can only be written to the SI/Oi transmit/receive register when the device is idle neither sending nor receiving data.
Figure 1 shows the operation timing Example of wiring
Microcomputer
CLKi SOUTi
Receiver side IC
CLK SIN
Example of operation
(1) Transmission enabled
1.5 TCLK (Max)
(2) Transmission is complete
(3) Highimpedance
Internal clock
SI/Oi transmit/receive register write signal
TCLK
SI/Oi output SOUTi CLKi SI/Oi input SINi SI/Oi interrupt request bit
(i = 3, 4) Cleared to "0" when interrupt request is accepted, or cleared by software "1" "0"
D0
D1
D2
D3
D4
D5
D6
D7
Hi-Z
TCLK = 2(n + 1) / fi fi: frequency of BRGi count source (f1, f8, f32) n: value set to SiBRG
Figure 1. Operation timing of transmission in SI/O3, 4 mode
REJ05B0051-0100Z
May 2003
Page 1 of 6
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