rej05b0107| Application Note

rej05b0107 PDF

rej05b0107| Application Note


APPLICATION NOTE

SH7144/45 Group
Complementary PWM 3-Phase Output
1. Specifications

Three-phase PWM waveform output is performed with a non-overlapping relationship between positive and negative phases, as shown in figure 1. The duty cycle can be changed between 0% and 100% by setting an arbitrary value in RAM.
Duty cycle = Pulse high width Pulse period 100 (%)

Toggle waveform output is performed synchronized with the period. When operating with on-chip peripheral clock P = 40.0 MHz, the output pulse period can be set arbitrarily in the range 50.0 ns to 1.63 ms.
Period

TIOC3A pin Non-overlap time TIOC3B pin TIOC3D pin TIOC4A pin TIOC4C pin

TIOC4B pin TIOC4D pin

Figure 1 Complementary PWM 3-Phase Output Waveforms

REJ05B0107-0100O/Rev.1.00

September 2003

Page 1 of 14


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